Inherited Redundancy and Configurability Utilization for Repairing Nanowire Crossbars with Clustered Defects

With the recent development of nanoscale materials and assembly techniques, it is envisioned to build high-density reconfigurable systems which have never been achieved by the photolithography. Various reconfigurable architectures have been proposed based on nanowire crossbar structure as the primitive building block. Unfortunately, high-density systems consisting of nanometer-scale elements are likely to have many imperfections and variations; thus, defect-tolerance is considered as one of the most exigent challenges. In this paper, we evaluate three different logic mapping algorithms with defect avoidance to circumvent clustered defective crosspoints in nanowire reconfigurable crossbar architectures. The effectiveness of inherited redundancy and configurability utilization is demonstrated through extensive parametric simulations

Redundancy Optimization for Clock-Free Nanowire Crossbar Architecture

In this paper a method is being proposed to find the optimal dimension of Programmable Gate Macro Block (PGMB) in clock-free nanowire crossbar architecture. A PGMB is a nanowire crossbar matrix with discrete number of rows and columns on which the NCL (Null Convention Logic) gates can be programmed. This method uses inherent redundancy to route through defective crosspoints. A 6 X 10 defect-free crossbar can be used to program any of the 27 threshold gates. Due to imperfections and variations in nanoscale manufacturing process, high defect densities are anticipated. Thus, such defects should be located when tested and the logic has to be rerouted around them to maintain proper functionality. This paper discusses this problem and tried to find an optimal solution through simulations. In the final submission, more effective logic mapping techniques will be proposed and validated

Cost-Driven Repair of a Nanowire Crossbar Architecture

The recent development of nanoscale materials and assembly techniques has resulting in the manufacturing of high-density computational systems. These systems consist of nanometer-scale elements and are likely to have many manufacturing imperfections (defects); thus, defect-tolerance is considered as one of the most some algorithms for repairing defective crosspoints in a nanoscale crossbar architecture; furthermore we estimate the efficiency and cost-effectiveness of each algorithm. Also, for a given design and manufacturing environment, we propose a cost-driven method to find a balanced solution by which figures of merit such as area, repair time and reconfiguration cost can be taken into account. Probabilistic parameters are utilized in the proposed cost-driven method for added flexibility

Automated Oxidase-Coupled Amperometric Microsensor with Integrated Electrochemical Actuation System for Continuous Sensing of Saccharoids

Recent developments for biosensors have been mainly focused on miniaturization and exploratory use of new materials. It should be emphasized that the absence of a novel in-situ self-calibration/diagnosis technique that is not connected to an external apparatus is a key obstacle to the realization of a biosensor for continuous use with minimum attendance. To address this deficiency, a novel needle-type biosensor system with fully automated operations is being developed, in which a novel oxidase-coupled amperometric sensor with oxygen depleting/generating actuator is interfaced with an electrochemical instrument and a perfusion system. Labview virtual instrument has been also developed to oversee the automatic control of the prototype sensor. Using the proposed system, a large amount of data can be rapidly collected for more effective sensor characterization and more advanced sensor designs. Autonomous and continuous sensing and self-calibration with minimal human intervention is also envisioned

Defect avoidance in nano crossbar architecture

With the recent development of nanoscale materials and assembly techniques, it is envisioned to build high-density reconfigurable systems which have never been achieved by the photolithography. Various reconfigurable architectures have been proposed based on nanowire crossbar structure as the primitive building block. Unfortunately, high density systems consisting of nanometer-scale elements are likely to have many imperfections and variations thus, defect-tolerance is considered as one of the most exigent challenges. Thus the defects should be located when tested and the logic has to be rerouted around them to maintain proper functionality. The thesis is organized into three papers, as described below The first two papers evaluate three different logic mapping algorithms with defect avoidance to circumvent clustered defective cross points in nanowire reconfigurable crossbar architectures. The effectiveness of inherited redundancy and configurability utilization is demonstrated through extensive parametric simulations. The third paper discusses programming asynchronous nano crossbar architecture and demonstrates a method to find an optimal solution to the dimensions of proposed architecture through simulations --Abstract, page iv

Cost-Driven Repair Optimization of Reconfigurable Nanowire Crossbar Systems with Clustered Defects

With the recent development of nanoscale materials and assembly techniques, it is envisioned to build high-density reconfigurable systems which have never been achieved by the photolithography. Various reconfigurable architectures have been proposed based on nanowire crossbar structure as the primitive building block. Unfortunately, high-density systems consisting of nanometer-scale elements are likely to have many imperfections and variations; thus, defect tolerance is considered as one of the most exigent challenges. In this paper, we evaluate three different logic mapping algorithms with defect tolerance to circumvent clustered defective crosspoints in nanowire reconfigurable crossbar architectures. The effectiveness of inherited redundancy and configurability utilization is demonstrated through extensive parametric simulations. Then, costs associated with the repair process are analyzed and a method to find the most cost-effective repair solution is presented

Clock-Free Nanowire Crossbar Architecture Based on Null Convention Logic (NCL)

There have been numerous nanowire crossbar architectures proposed till date, although all of them are envisioned to be synchronous (i.e., clocked). The clock is an important part in a circuit and it needs to be connected to all the components to synchronize their operation. Considering non-deterministic nature of nanoscale integration, realizing them on a nano wire crossbar system would be quite cumbersome. Unlike the conventional clocked counterparts, a new clock-free crossbar architecture is proposed to resolve the issues with clocked counterparts in this paper, where the use of clock is eliminated from the architecture. This has been done by implementing delay-insensitive logic encoding technique called Null Convention Logic (NCL). A delay-insensitive full adder has been implemented on the proposed architecture to demonstrate the feasibility in this paper

Automatic Node Discovery in CAN (Controller Area Network) Controllers Using Reserved Identifier Bits

A new technique for automatic address space configuration in CAN network is proposed in this work The proposed technique is to use two reserved bits of CAN extended identifier field in the initial address assignment process. These reserved bits can be in one of the following three states: Address Acquired, Address Assignment Pending and Address Claim Override. An address configuration protocol is proposed based upon these added states and a finite state machine for the protocol is also shown. Real-time behavior of the proposed address space configuration technique can be further validated by a series of parametric simulations using tools like OPNET. © 2007 IEEE